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Analog and Power Wafer Level Chip Scale Packaging presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Since the analog and power electronic wafer level packaging is different from regular digital and memory IC package, this book will systematically introduce the typical analog and power electronic wafer level packaging design, assembly process, materials, reliability and failure analysis, and material selection. Along with new analog and power WLCSP development, the role of modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical and stress modeling methodologies is also presented in the book.
- Sales Rank: #1723382 in Books
- Published on: 2014-09-11
- Original language: English
- Number of items: 1
- Dimensions: 9.21" h x .81" w x 6.14" l, .0 pounds
- Binding: Hardcover
- 322 pages
Review
“Wafer Level Chip-Scale Packaging by Qu, Shichun, Liu, Yong presents good technical insights of wafer-level chip scale packaging (WLCSP) technology, suitable for both industry and academic practitioners. … It is a good reference to demonstrate the alternate wafer-level chip scale packaging, and can serve as a very informative technical reference. … The book is valuable as a learning tool for WLCSP and its clear relevance to real-world industry practices make it useful for both students and reliability practitioners.” (Chong Leong Gan and Uda Hashim, Microelectronics Reliability, August, 2015)
From the Back Cover
This book presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability, and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials, and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Along with new analog and power WLCSP development, the role of modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical, and stress modeling methodologies is also provided.
This book also:
· Covers the development of wafer-level power discrete packaging with regular wafer-level design concepts and directly bumping technology
· Introduces the development of the analog and power SIP/3D/TSV/stack die packaging technology
· Presents the wafer-level analog IC packaging design through fan-in and fan-out with RDLs
Most helpful customer reviews
0 of 0 people found the following review helpful.
Good book for entry to senior level pacakging engineers
By DaQu
Not a one-cover-all (the details) book, but good reference for even seasoned packaging engineers and colledge students who are considering entering the field.
0 of 0 people found the following review helpful.
Five Stars
By William Bowerman
Up to date and provides a detail description of design, reliability and test concerns.
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